ARM CSPR (Instructions)

• Program Status Register Instructions

  • MRS instruction transfers the contents of either cpsr or spsr into a register

    • Can also transfer in the reverse direction MSR

  • Allows read/write of cpsr and spsr

  • syntax includes 'fields' which can be a combination of control (c), extension (x), status (s), and flags (f)

  PSR byte regions

  • Control [0:7] bits 0 to 7

    • mode [0:4]

    • T (THUMB ISA) bit 5

    • F (FIQ Interrupts) bit 6

    • I (IRQ Interrupts) bit 7

  • eXtension[8:15]

  • status[16:23]

  • Flags[24:31]

    • V bit 28

    • C bit 29

    • Z bit 30

    • N bit 31

  • Syntax:

    MRS{} Rd, <cpsr|spsr> MSR{} <cpsr|spsr>, Rm MSR{} <cpsr|spsr>, #immediate

• Example:

  Before: cpsr = nzcvqIFt_SVC

  MRS r1, cpsr BIC r1, r1, #0x80 MSR cpsr_c, r1

  1. Copies the cpsr register to r1

  2. BIC instruction clears bit 7 of r1

  3. Copies r1 back to cpsr

  ** bit 7 is the IRQ, clearing it unmasks IRQ interrupts **