Maurice's Notes
Blog
Low Level Computing
Low Level Computing
  • Operating Systems
    • General Operating Systems
      • OS Structure
      • Main Memory
        • Basic Hardware
        • Address Binding
        • Memory Address Register
      • Booting
        • MBR (Master Boot Record)
        • Global Descriptor Table
      • Direct Memory Access (DMA)
        • DMA
      • Processes
        • Basics
        • Process Scheduling
    • Linux Operating System
      • Linker Scripts
      • Position Independent Code/Executable
      • Relocation
      • Understanding PLT and GOT
    • Windows Operating System
      • Page 1
    • Real-Time Embedded Systems
      • Real-Time Scheduling
        • Cyclic Executive
  • Computer Architecture
    • Architecture Fundamentals
      • Introduction
      • Cache Basics
      • Cache Memory
      • A Few CPU Formulas
    • RISC Architectures
      • ARM
        • ARM Design Philosophy
        • RISC Review
        • Exceptions, Interrupts, & Vector Table
        • ARM Pipelines
        • ARM Registers
        • ARM Branch Instructions
        • ARM CSPR (Instructions)
        • ARM Data Processing Instructions
        • Load/Store Instructions
        • Profiling Cycle Counter
        • Compiler Optimizations
      • RISCV
    • CISC Architectures
    • Cache Coherency
      • Basic Introduction
      • Memory Sequential Consistency
  • Exploits
    • Walkthrough: Return-to-Libc
    • Access Physical Memory
  • Compilers & Runtime Systems
    • Introduction
      • Programming Language Basics
      • Static Scope
    • Syntax Translation
      • Syntax Defined
      • Parsing
    • Algorithms
      • FIRST FOLLOW (Top-Down) Parsing
      • Building a Recursive Descent Parser
      • Construction: Regular Expression -> NFA
Powered by GitBook
On this page
  • Memory-Address Register
  • Memory Buffer Register/Memory Data Register (MDR)

Was this helpful?

  1. Operating Systems
  2. General Operating Systems
  3. Main Memory

Memory Address Register

PreviousAddress BindingNextBooting

Last updated 2 months ago

Was this helpful?

Memory-Address Register

The Memory-Address Register is a CPU register that either:

  • Holds the memory address from which data can be fetched to the CPU registers, or

  • Holds the memory address to which data will be sent and stored via the system bus.

The MAR is used to access data and instructions from memory during the execution phase of instruction. The MAR holds the memory location of data that needs to be accessed.

When reading, data addressed by the MAR is fed into the MDR and then used by the CPU. When writing to memory, the CPU writes data from MDR to the memory location pointed to by the MAR.

MAR, which is found inside of the CPU, goes to RAM or cache.

Memory Buffer Register/Memory Data Register (MDR)

Is the register in the CPU that stores the data being transferred to and from the immediate access storage.

See more on .

Wikipedia