ARM Branch Instructions

• Branch Instructions

  • mostly review

  • changes the flow of executions

• Instructions

  • B {} label -> Branch

  • BL {} label -> branch with link

  • BX {} Rm-> branch exchange

  • BLX {} label | Rm -> branch exchange with link

• Branch with link refers to the use of lr (link register r14) where the processor core stores the return address when calling a subroutine

  • BL label

  • BLX label

    • For these branch instructions, lr will have return address, i.e. the address of the next instruction after the branch instruction

• Branch conditions, if the condition is met, will update the program counter

  • When the program counter is changed by a branch instruction, the processor will flush the entire pipeline.

  • PC will be set to label

    • except for BX, it will be Rm &

• the address 'label' is stored in the instruction as a signed pc-relative offset and must be within approx. 32MB of the branch instruction.

  • THUMB bit can also be set in the cpsr with branch instructions

    • this will of course switchto 16-bit instructions

  • T = Rm & 1 can unset the THUMB bit

  • why within 32Mb?

    • ARM branch instructions use 24-bit signed offset to specifiy the distance to target

    • ARM will left shift the offset two bits to increase range that can be covered

      • Again, left shift 1 bit multiplies by 2, left shift 2 bits multiplies by 4

    • This allows the branch instruction to specify or reach an address that is 2^25 bytes away. 2^25 bytes is roughly 32MB