A Few CPU Formulas
CPU execution time = (CPU clock Cycles + Memory Stall Cycles) X Clock Cycle Time
hit and that the processor is stalled during a cache miss
Memory Stall cycles = Number of misses X Miss Penalty = IC X Misses/Instruction X Miss penalty = IC X Memory Accesses/Instruction X Miss Rate X Miss Penalty
Measuring Instruction count for speculative processors, we only count instructions that commit
Measuring memory references is similarly easy
Every instruction requires instruction access, and it is easy to decide if it also requires data access.
The component miss rate is simply the fraction of cache accesses that result in a miss.
Miss rates can be measured with cache simulators that take an address trace of the instruction and data references, simulate the cache behavior to determine which references hit and which miss, and then report the hit-and-miss totals.
Many microprocessors today provide hardware to count the number of misses and memory references, which is a much easier and faster way to measure miss rate.
Memory stall clock cycles = IC X Reads per instruction X Read miss rate X Read miss penalty.
IC Writes per instruction X Write miss rate X Write miss penalty.
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